Skip to content

151 [fpga] petalinux fpga manager


Comments

konosubakonoakua · 2025-02-26T13:23:38Z

pl.dtbo overlay

konosubakonoakua · 2025-02-26T13:46:58Z

scripts

  • generate bit wrapper bin file
    source /tools/Xilinx/Vivado/2019.1/settings64.sh
    cd petalinux/images/linux
    
    tee design_1_wrapper.bit.bif << EOF
    all:
    {
      ../../../project/project.runs/impl_1/design_1_wrapper.bit
    }
    EOF
    
    echo "all: { ../../../project/project.runs/impl_1/design_1_wrapper.bit }" design_1_wrapper.bit.bif
    
    bootgen -image design_1_wrapper.bit.bif -arch zynq -o ./design_1_wrapper.bit.bin -w
    
  • flash bin to fpga
    BITSTREAM_NAME=design_1_wrapper.bit.bin
    cp /root/shared/$BITSTREAM_NAME /lib/firmware
    echo 0 > /sys/class/fpga_manager/fpga0/flags
    echo $BITSTREAM_NAME > /sys/class/fpga_manager/fpga0/firmware
    

konosubakonoakua · 2025-02-26T15:10:08Z

issues

  • cannot download fpga via system interface
     echo $BITSTREAM_NAME > /sys/class/fpga_manager/fpga0/firmware
    fpga_manager fpga0: reading flags 0
    fpga_manager fpga0: writing design_1_wrapper.bit.bin to Xilinx Zynq FPGA Manager
    fpga_manager fpga0: Error after writing image data to FPGA
    -bash: echo: write error: Connection timed out
    
  • 0001-fix-zynq-pr.patch
  • zynqmp_fix.patch

konosubakonoakua · 2025-02-26T15:59:48Z

fpgautil

  • https://github.com/Xilinx/meta-xilinx/blob/master/meta-xilinx-core/recipes-bsp/fpga-manager-script/files/fpgautil.c